Designing Energy-Efficient Architectures for Future Unmanned Aerial Vehicles.
Add to Google Calendar
The DARPA PERFECT (Power Efficiency Revolution For Embedded Computing Technology) program has set a goal to achieve 75 GFLOPS/W efficiency for DARPA computing problems in the 7nm technology node. As an example platform, DARPA is investigating the processor design for a future Unmanned Aerial Vehicle (UAV). The goal of 75 GFLOPS/W will enable more UAV's in the same airspace, while decreasing the probabilities of detection and interception. With the help of Boeing, the Michigan team has investigated the computational requirements of wide-angle motion imaging for a 1.8 GPixel camera array and designed a heterogeneous architecture that tackles the wide range of application requirements. The Michigan team approach leverages the use of Near-Threshold Computing (NTC) and 3D Integration to achieve these aggressive computational efficiency goals. In this talk background on NTC and 3D Integration will be discussed, and an initial architecture and the remaining research will be explored.
Dr. Ronald Dreslinski is an Assistant Research Scientist at the University of Michigan. He received his Ph.D from the University of Michigan in 2011. His research interests include low power architectures and the interaction of circuits and architecture.