Serial Link and Channel Co-Design for Low Power Signaling on a Multi-Chip Module

With the "end" of Moore's Law, there is renewed interest in multi-chip modules,
which provide a way to build large systems with relatively small chips built
on disparate technologies. To make this practical, signaling on
an MCM must be extremely pin- and energy-efficient. This talk describes some
recent work at Nvidia to build such links, resulting in chip-to-chip signaling
that is as energy efficient as on-chip signaling.

John Poulton received the B.S. degree from Virginia Polytechnic
Institute and State University, Blacksburg, in 1967, the M.S. degree from the
State University of New York, Stony Brook, in 1969, and the Ph.D. degree from
the University of North Carolina, Chapel Hill (UNCCH) in 1980, all in physics.

>From 1981 to 1999, he was a researcher with the Department of Computer Science,
UNCCH, where from 1995 he held the rank of Research Professor. He performed
research on VLSI-based architectures for graphics and imaging and was a pricipal
contributor to the design and construction of several experimental high-performance
graphics systems. From 1999 to 2003 he was Chief Engineer with Velio
Communications, where he developed gigabit chip-to-chip
signaling systems. From 2003 to 2009 he was a Technical Director with Rambus,
Inc., Chapel Hill, where he led an effort to build power-efficient
multi-gigabit I/O systems. Presently he is Senior Scientest at NVIDIA, Inc.,
Durham, NC, and is an IEEE Fellow.