Fast, Flexible, and Intelligent Next-Generation Networks

Zoom link for remote participants

Abstract:

Maintaining strict security and performance objectives in next-generation cloud and edge networks demands that compute-intensive management and control decisions are made on the current state of the entire network (e.g., topology, queue sizes, and link and server loads), and applied per-packet at line-rate, in a fast-and-intelligent way. Unfortunately, the dominant solutions available today are either fast-yet-dumb or slow-but-intelligent. Data-plane devices (e.g., switches and NICs) can react in nanoseconds to network conditions; however, they are designed for routing packets and have a constrained programming model (e.g., match-action tables or MATs). Conversely, control-plane servers can make complicated data-driven (AI-based) decisions, yet the round trip between the controller and the device fundamentally limits their reaction speed.

In this talk, I will show how my research helps bridge this gap between speed, flexibility, and intelligence. I will present a new data-plane architecture (Taurus) and a declarative programming framework (Homunculus) that, for the first time, allows network operators to execute per-packet data-driven decisions directly within the data-plane device at line rate. I will first focus on the design of Taurus and the accompanying parallel-patterns abstraction (MapReduce), which supports data parallelism to efficiently execute common ML models (e.g., DNNs and SVMs). I will then demonstrate how, using training data, objectives, and constraints as inputs, Homunculus automatically converts the operator’s high-level policies into an efficient ML model to execute on the underlying data-plane device (e.g., Taurus). I will conclude with an overview of my broader research vision and future plans for realizing the full potential of fast, flexible, and intelligent next-generation networks (and systems).

Bio: Muhammad Shahbaz is a Kevin C. and Suzanne L. Kahn New Frontiers Assistant Professor in Computer Science at Purdue University. His research focuses on designing and developing domain-specific (performance) abstractions, compilers, and architectures for emerging workloads (including machine learning, self-driving networks, serverless compute, and 5G). Shahbaz received his Ph.D. and M.A. in Computer Science from Princeton University and his B.E. in Computer Engineering from the National University of Sciences and Technology (NUST). Before joining Purdue, Shahbaz worked as a postdoc at Stanford University and a Research Assistant at Georgia Tech and the University of Cambridge. Shahbaz has built open-source systems, including Pisces, SDX, and NetFPGA-10G, that are widely used in industry and academia. He has received multiple awards, including the Facebook and Intel Research Awards, IETF/IRTF ANRP Prize, ACM SOSR Systems Award, Best of CAL Paper Award, IEEE Micro Top Picks (Honorable Mention), and the Internet2 Innovation Award.